debug time中文是什么意思

發(fā)音:

中文翻譯
造句

整時(shí)間，調(diào)試時(shí)間

real time debug program 即時(shí)除錯(cuò)程序; 實(shí)時(shí)調(diào)試程序
real-time debug program 實(shí)時(shí)調(diào)試程序
real-time debug routine 實(shí)時(shí)調(diào)試?yán)谐绦?/li>
debug vt. (-bugged; -bugging) 1.驅(qū)除(某處的)害蟲(chóng)。 2.排除(飛機(jī)等的)故障；(自動(dòng)化裝置中)移去(程序等中的)錯(cuò)誤。 3.【無(wú)線電】調(diào)整，調(diào)諧。 4.尋出并拆除…內(nèi)的竊聽(tīng)器。 5.(用電子儀器)使(竊聽(tīng)器)失效。 debugger 拆除竊聽(tīng)器專家。
debug ( 開(kāi)啟除錯(cuò)檢視窗口
arithmetic debug 運(yùn)算調(diào)試
debug aid 調(diào)試輔助程序, 調(diào)式工具
debug aids 調(diào)試輔助程序; 調(diào)試工具
debug build 調(diào)試版本
debug card 除錯(cuò)卡; 調(diào)試卡片
debug command 調(diào)試命令
debug control 調(diào)試控制
debug debugger 偵錯(cuò)程序
debug driver 翟程序
debug function 調(diào)試功能
debug grip 偵錯(cuò)程式語(yǔ)言
debug heap 調(diào)試堆積; 偵錯(cuò)堆積
debug item 調(diào)試項(xiàng)目
debug kernel 調(diào)試核心
debug line 排錯(cuò)行
debug machine 調(diào)機(jī), 故障排除機(jī); 調(diào)試機(jī); 故障排除機(jī)
debug macro 調(diào)式宏指令; 調(diào)試宏指令
debug macroinstruction 調(diào)試宏指令
debug method 調(diào)試方法
debug mode 調(diào)試方式; 調(diào)試模式

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例句與用法

The trend is to write compilers in high-level languages, because of the reduced amount of programming time and debugging time .
目前傾向使用高級(jí)語(yǔ)言編寫(xiě)編譯程序，因?yàn)檫@減少了大量的編程序和調(diào)程序的時(shí)間。
This allows a component creator to ship the visualizer in a dll to be called only at debug time
這樣一來(lái)，組件創(chuàng)建者便可以通過(guò)僅在調(diào)試時(shí)調(diào)用的dll提供可視化工具。
Ensures that all variables are declared and spelled correctly, which reduces debugging time . the
可確保所有變量的聲明方式和拼寫(xiě)方式均正確無(wú)誤，這樣就縮短了調(diào)試時(shí)間。
At the same time, the signal integrity about the key circuit is simulated with the hyperlynx software . with which the circuit performation is enhanced, the debugging time and the cost are reduced
并且通過(guò)mentorgraphics公司的hyperlynx仿真軟件對(duì)電路關(guān)鍵部分的信號(hào)完整性進(jìn)行了仿真,以此提高了電路設(shè)計(jì)的成功率,縮短了產(chǎn)品設(shè)計(jì)調(diào)試周期,減少了成本損失。
The intelligentized indoors communication systems in this paper has assed the system debugging time after time, and used in slap-up dwelling house, which proves fully its rationality and feasibility, it possess the wide market foreground
本文中的智能信息家電系統(tǒng)已經(jīng)過(guò)多次系統(tǒng)調(diào)試，并在高檔住宅中使用，充分證明了其合理性和可行性，具有廣闊的市場(chǎng)前景。
Designer can synthesize the pci core and the user's logic into an fpga chip, and can do simulation analysis to test the pci core and the user's logic . this technique can increase the design and debugging time, develop the capability of the system
設(shè)計(jì)者可以將pci用戶邏輯與pcicore集成在一片fpga里，并且可以在頂層通過(guò)仿真來(lái)驗(yàn)證pci接口以及用戶邏輯設(shè)計(jì)的正確與否，這樣可以大幅度提高調(diào)試速度，縮短開(kāi)發(fā)周期，提高電路板的集成度和系統(tǒng)的性能。

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